Electrical & Computer Engineering Faculty Publications
Document Type
Article
Publication Date
3-30-2012
Abstract
Parallel computer architectures utilize a set of computational elements (CE) to achieve performance that is not attainable on a single processor, or CE, computer. A common architecture is the cluster of otherwise independent computers communicating through a shared network. To make use of parallel computing resources, problems must be broken down into smaller units that can be solved individually by each CE while exchanging information with CEs solving other problems.
Language (ISO)
English
Sponsorship
ANNUAL ALLERTON CONFERENCE ON COMMUNICATION CONTROL AND COMPUTING
Recommended Citation
Abdallah, Chaouki T.; J. D. Birdwell; J. Chiasson; Z. Tang; N. Alluri; and Tsewei Wang. "The Effect of Communication Time Delays in Parallel Computations." (2012). https://digitalrepository.unm.edu/ece_fsp/87
