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Bounded controller design of an ABR explicit rate algorithm for ATM switches

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Please use this identifier to cite or link to this item: http://hdl.handle.net/1928/20270

Bounded controller design of an ABR explicit rate algorithm for ATM switches

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dc.contributor.author Abdallah, Chaouki T.
dc.contributor.author Tarbouiech, Sophie
dc.contributor.author Ariola, Marco
dc.date.accessioned 2012-03-29T20:18:18Z
dc.date.available 2012-03-29T20:18:18Z
dc.date.issued 2003-12-09
dc.identifier.citation Proceedings of the 42nd IEEE Conference on Decision and Control, 2003, 3: 2519-2524 en_US
dc.identifier.issn 0191-2216
dc.identifier.uri http://hdl.handle.net/1928/20270
dc.description Digital Object Identifier: 10.1109/CDC.2003.1273000 en_US
dc.description.abstract Browse > Conferences> Decision and Control, 2003. Pr ... Bounded controller design of an ABR explicit rate algorithm for ATM switches .1273000 abstract . Tarbouriech, S.; Ariola, A.; Abdallah, C.T.; CNRS, Toulouse, France This paper appears in: Decision and Control, 2003. Proceedings. 42nd IEEE Conference on Issue Date: 9-12 Dec. 2003 On page(s): 2519 - 2524 Vol.3 ISSN: 0191-2216 Print ISBN: 0-7803-7924-1 INSPEC Accession Number: 8037709 Digital Object Identifier: 10.1109/CDC.2003.1273000 Date of Current Version: 15 March 2004 Abstract Congestion control in the available bit rate (ABR) class of asynchronous transfer mode (ATM) networks poses interesting challenges due to the presence of delays, magnitude and rate constraints, and additive disturbances. In this paper, we consider a discrete-time fixed-structure controller for an ATM/ABR switch, and solve a robust tracking control problem in which the target is a threshold on the queue level. en_US
dc.description.sponsorship IEEE en_US
dc.language.iso en_US en_US
dc.publisher IEEE en_US
dc.subject Algorithm design and analysis en_US
dc.subject Asynchronous transfer mode en_US
dc.subject Bit rate en_US
dc.subject Communication system traffic control en_US
dc.title Bounded controller design of an ABR explicit rate algorithm for ATM switches en_US
dc.type Article en_US


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