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Dynamically reconfigurable management of energy, performance, and accuracy applied to digital signal, image, and video Processing Applications

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Please use this identifier to cite or link to this item: http://hdl.handle.net/1928/20835

Dynamically reconfigurable management of energy, performance, and accuracy applied to digital signal, image, and video Processing Applications

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Title: Dynamically reconfigurable management of energy, performance, and accuracy applied to digital signal, image, and video Processing Applications
Author: Llamocca Obregon, Daniel Rolando
Advisor(s): Pattichis, Marios
Committee Member(s): Pattichis, Marios
Christodoulou, Christos
Lyke, James C.
Lumia, Ron
Department: University of New Mexico. Dept. of Electrical and Computer Engineering
Subject: Computer Architecture, FPGA, Dynamic Partial Reconfiguration
LC Subject(s): Adaptive computing systems.
Signal processing--Digital techniques.
Image processing--Digital techniques.
Field programmable gate arrays.
Degree Level: Doctoral
Abstract: There is strong interest in the development of dynamically reconfigurable systems that can meet real-time constraints in energy/power-performance-accuracy (EPA/PPA). In this dissertation, I introduce a framework for implementing dynamically reconfigurable digital signal, image, and video processing systems. The basic idea is to first generate a collection of Pareto-optimal realizations in the EPA/PPA space. Dynamic EPA/PPA management is then achieved by selecting the Pareto-optimal implementations that can meet the real-time constraints. The systems are then demonstrated using Dynamic Partial Reconfiguration (DPR) and dynamic frequency control on FPGAs. The framework is demonstrated on: i) a dynamic pixel processor, ii) a dynamically reconfigurable 1-D digital filtering architecture, and iii) a dynamically reconfigurable 2-D separable digital filtering system. Efficient implementations of the pixel processor are based on the use of look-up tables and local-multiplexes to minimize FPGA resources. For the pixel-processor, different realizations are generated based on the number of input bits, the number of cores, the number of output bits, and the frequency of operation. For each parameters combination, there is a different pixel-processor realization. Pareto-optimal realizations are selected based on measurements of energy per frame, PSNR accuracy, and performance in terms of frames per second. Dynamic EPA/PPA management is demonstrated for a sequential list of real-time constraints by selecting optimal realizations and implementing using DPR and dynamic frequency control. Efficient FPGA implementations for the 1-D and 2-D FIR filters are based on the use a distributed arithmetic technique. Different realizations are generated by varying the number of coefficients, coefficient bitwidth, and output bitwidth. Pareto-optimal realizations are selected in the EPA space. Dynamic EPA management is demonstrated on the application of real-time EPA constraints on a digital video. The results suggest that the general framework can be applied to a variety of digital signal, image, and video processing systems. It is based on the use of offline-processing that is used to determine the Pareto-optimal realizations. Real-time constraints are met by selecting Pareto-optimal realizations pre-loaded in memory that are then implemented efficiently using DPR and/or dynamic frequency control.
Graduation Date: May 2012
URI: http://hdl.handle.net/1928/20835


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